Two low-power demonstrator DC circuit breakers developed and tested

WP6 of the PROMOTioN project deals with DC circuit breaker characterisation. It consists of 10 tasks, of which two (6.5 and 6.6) focus on laboratory-scale demonstration of DC CB technologies. The benefit of lab-scale hardware testing lies in its flexibility and wide range of test scenarios (including destructive), enabling the investigation of new topologies and control methods. Therefore, these studies will complement full-scale testing conducted in WP10.


The main objective of task 6.5 has been to develop kW-size hardware models for hybrid and mechanical DC circuit breakers. A 900 V, 500A hybrid DC circuit breaker and a 900V, 500A mechanical DC circuit breaker have been built, and all major tests are now completed. In addition, it was necessary to assemble a dedicated 900V, 500A test circuit capable of emulating DC fault conditions and supplying required fault currents and energy (over 2.0kJ) without disrupting the local power supply grid (see figure 1).

Both hybrid and mechanical DC CBs have been successfully tested for interrupting rated positiveand negative 500A fault currents, for lower currents, and for repeated open-close operation. Additionally, hybrid DC circuit breakers have been tested for fault current limiting, which is one of the important new functions of full-scale hybrid DC CBs. The laboratory DC-CB demonstrators have been built to as closely as possible mirror the topologies of the full-scale DC CBs which are tested in WP10 and might be deployed in future DC transmission grids (see figure 2). Some components of the scaled demonstrators differ, given the lower power levels involved. The test circuit is developed and controlled to replicate real-life stresses on DC CBs in a high-power DC grid.

These laboratory demonstration DC circuit breakers have so far been used to verify DC CB PSCAD and RTDS models and their controls. In addition, some new DC CB control methods have been proposed and tested on the hardware prototypes. The experience gained via development and testing of these units increases understanding and acceptance of the new technologies. It enables us to move beyond computer models, to face real-world challenges such as performance limitation due to parasitic parameters, signal processing restrictions, difficulties in component supply, safety, assembly and reliability issues.

The intent is to employ these hardware DC CBs in the forthcoming task 6.6. The failure modes of DC CBs will be analysed and verified on the hardware DC CBs. The subsystems of DC CBs will be stressed to performance limits and beyond, and failure models will be developed to enable us to predict how these units will respond in high-power systems.